1. Field of the Invention
The present invention relates to a capacitor-equipped semiconductor integrated circuit and also a non-volatile semiconductor memory device.
2. Description of the Related Art
In semiconductor memories such as NAND-type flash memories, capacitors are used in various types of peripheral circuits such as boosting circuits and sense amplifiers or the like. These capacitors are formed as MOS capacitors or well capacitors above a semiconductor substrate by the same process as that of transistors making up memory cells.
A MOS capacitor has a gate electrode that is formed through a gate insulation film on either a semiconductor substrate or a well and diffusion regions that are formed to sandwich the gate electrode therebetween. It is a capacitor in which an inversion layer is formed in a channel region by applying a voltage to the diffusion regions. It utilizes the capacitance between this inversion layer and the gate electrode.
A well capacitor is a capacitor that has a gate electrode formed via a gate insulation film above a well formed on a semiconductor substrate. An accumulation layer is formed immediately beneath the gate insulation film by applying a voltage to this well. A capacitance between this accumulation layer and the gate electrode is used as a capacitance.
In the case of forming these MOS and well capacitors as circuit elements in a semiconductor integrated circuit such as a NAND-type flash memory or else, there is a problem which follows. Parasitic capacitance takes place due to the presence of signal lines and/or wiring lines such as power supply lines passing over the capacitors or due to other factors, causing capacitor-containing circuitry to decrease in electrical characteristics.